Building A 4MB SRAM Expansion Board For The X68000

A 4MB RAM expansion board can give the Sharp X68000 considerably more working space for games, productivity software, music tools, image processing and development environments. Using asynchronous SRAM makes the design approachable for a hobbyist because the memory interface is straightforward, timing is predictable and the parts avoid the refresh circuitry required by older DRAM.

The project still needs careful attention to the X68000 bus, memory mapping and physical construction. A board that appears electrically plausible may fail because of incorrect byte-lane wiring, unsuitable bus timing, poor address decoding or a missing termination detail. The safest approach is to treat the expansion as a small computer engineering project: document the target machine, verify each signal, build in stages and test with software that can expose partial memory faults.

Choosing SRAM And Defining The Memory Size

A 4MB capacity means 4,194,304 bytes. The 68000 uses a 16-bit data bus, with separate upper and lower data strobes selecting the two byte lanes. A practical arrangement uses four 1M × 8 asynchronous SRAM chips. Two devices serve the lower byte lane and two serve the upper byte lane, providing 4MB in total.

Another option is eight 512K × 8 devices. That arrangement can be easier if suitable 5V SRAM is already available, although it increases the component count and PCB routing. Modern 5V-compatible parts with access times around 55ns or faster are generally a comfortable choice for an X68000 expansion, provided their input thresholds, output voltage and power requirements suit the system. Avoid assuming that a 3.3V SRAM is safe simply because its data sheet lists 5V-tolerant inputs; the output and supply conditions must be checked separately.

The design should also identify where the new memory will appear in the X68000 address map. Models and existing expansion boards can differ, so the selected address range should be confirmed against service documentation, known RAM boards and the operating software used for testing. An address decoder built around a small programmable logic device, GAL, CPLD or a group of logic gates can generate a clean chip-select signal for the chosen region.

Capacity alone does not guarantee compatibility. Some software expects conventional expansion RAM at a particular address, while other applications detect memory through system facilities or board-specific utilities. Decide whether the board is intended as general-purpose extended RAM, a replacement for a known memory board or a development platform with its own driver.

Connecting The X68000 Bus Correctly

The 68000 presents address lines, data lines, asynchronous control signals and bus-cycle timing signals. The SRAM address inputs connect to the relevant CPU address lines after accounting for the 68000’s word organisation. The lowest CPU address bit is represented through byte selection rather than a direct memory address pin in the same manner found on many 8-bit systems. This is where many first designs go wrong.

The lower and upper SRAM banks must be controlled by the appropriate data strobes, commonly identified as /LDS and /UDS. A word access enables both byte lanes, while an odd or even byte access enables only the required lane. The board’s chip-select logic should combine the decoded address region with the bus-cycle qualifier, and each SRAM output-enable input should respond to a read cycle. Write-enable should be asserted only during a valid write cycle.

The memory must also return a suitable data-transfer acknowledgement. Depending on the expansion interface and design approach, this may come from a fixed delay circuit, programmable logic or an existing system signal. A design that holds the CPU indefinitely will appear dead; one that acknowledges too early can produce intermittent corruption. Begin with conservative timing and verify operation with a logic analyser or oscilloscope before attempting maximum-speed access.

Keep the signal path short and predictable. The address decoder, bus buffers and SRAM should be arranged so that long traces do not run parallel to sensitive control lines. A pair of 74-series transceivers may protect the computer’s bus and reduce loading, but buffers introduce propagation delay that must be included in the timing calculation. Decoupling capacitors should sit close to every SRAM and logic IC, with a larger electrolytic or polymer capacitor near the board’s power entry.

Designing The PCB For A Reliable Build

A two-layer PCB can be sufficient if the layout is disciplined, though four layers make power distribution and signal integrity easier. Use a continuous ground area wherever possible, keep the 5V rail wide and place a 100nF ceramic capacitor beside each memory device. Provide test points for 5V, ground, chip-select, read, write and at least one address line. These points are invaluable when diagnosing a board inside a compact Japanese computer.

The expansion connector deserves mechanical attention. Measure the original connector, card thickness, keying and insertion depth rather than relying on a generic edge connector drawing. A board that is electrically correct can still damage the X68000 if its contacts are offset or its silkscreen encourages insertion in the wrong direction. Add a clear orientation mark and consider a physical key or cover that prevents reversal.

For Australian builders, component sourcing can be split between local distributors and the second-hand market. Element14 Australia and RS Components Australia may stock suitable logic and SRAM, while Jaycar can be useful for capacitors, headers, wire and bench supplies. Specialist memory chips are often easier to find through international sellers or eBay, so include GST, postage and delivery time in the budget rather than comparing only the advertised part price. Sydney, Melbourne and Brisbane enthusiasts may also find useful stock through local retro-computing groups or electronics swap meets.

Avoid sockets unless the board is specifically intended for experimentation. Socketed SRAM can simplify replacement, but it increases height and creates another source of intermittent contact in a machine that may be moved or stored for long periods. If sockets are necessary, use quality turned-pin types and inspect them after repeated insertion. A conformal coating is usually unnecessary; a clean, dry board with accessible test points is easier to service.

Bringing The Board Up In Stages

Before inserting SRAM, inspect every power and ground connection with a multimeter. Check for shorts between 5V and ground, confirm the orientation of every polarised component and verify that the expansion connector matches the intended pinout. Power the board from a current-limited bench supply if possible, then measure its idle consumption. Unusually high current is a reason to stop immediately rather than trying to identify the hot component by touch.

The first live test should use the decoder and one memory bank, or a reduced-capacity population that allows the bus signals to be observed. Confirm that the board remains deselected outside its assigned address range. A logic analyser should show address activity, the expected byte strobes and a clean acknowledgement during reads and writes. Check both word transfers and individual byte transfers, since a board can pass word tests while silently swapping or disabling one byte lane.

Once basic bus activity is correct, run a memory test that writes alternating patterns such as 00, FF, AA and 55 across the complete range. Walking-bit patterns can expose stuck data lines, while address-dependent values can identify shorted or swapped address lines. Test the memory in blocks and repeat the process after the machine has warmed up. SRAM faults caused by marginal timing or poor power delivery can take several minutes to appear.

Use a known-good X68000 configuration for the first installation. Disconnect unrelated modifications and expansion cards so that a failure has fewer possible causes. If the system has a repaired floppy mechanism, confirm that it can boot diagnostic media reliably; the floppy drive belt guide is useful background when preparing an older unit for repeated testing. A stable boot path saves considerable time when the new board initially cannot be addressed.

Software Detection And Long-Term Maintenance

The board should be tested with both a dedicated memory checker and ordinary X68000 software. A diagnostic program can identify the amount of available RAM, but it may not exercise every access mode used by games, MIDI tools or graphics applications. Copy large files, unpack archives, load sizeable image data and run a program that allocates memory repeatedly. These practical tests often reveal byte-lane or timing faults missed by a short pattern test.

Keep the hardware test environment separate from modern software workflows. An archival workstation may be used to prepare disk images, documentation or video demonstrations, but a patched video editor is not a substitute for validating software on the original machine, and unofficial downloads can introduce legal and security problems. For preservation work, prefer licensed tools, trusted open-source utilities and documented disk-image procedures, then verify the resulting media on the X68000 itself.

Document the board revision, SRAM part numbers, address range, GAL or CPLD equations and test results. Photograph the finished PCB before installation and record the machine model, operating system version and other installed expansions. This information matters when comparing results between an X68000 ACE, Expert, XVI or Compact, since physical connectors, memory expectations and timing behaviour may vary.

Store spare SRAM in antistatic packaging and keep the board away from humid storage areas, direct sunlight and poorly regulated power supplies. Australian summer temperatures in inland areas can make marginal components less forgiving, while coastal locations expose equipment to salt-laden air. A dry cabinet, sensible ventilation and periodic inspection are inexpensive protection for a machine whose replacement parts are becoming increasingly scarce.

A carefully built 4MB SRAM board is valuable because it remains understandable and repairable. The circuit can be recreated from its schematic, the memory chips can be replaced, and the logic can be examined with ordinary workshop equipment. That makes it a useful preservation project rather than a disposable upgrade.

Gather the bus documentation, select verified 5V SRAM, draw the address and byte-lane mapping before ordering parts, and test each stage with current limiting and proper instruments. Publish the schematic, board files and measured results so other X68000 owners can reproduce the design, compare it across models and keep more of these distinctive computers operating in the years ahead.