Measuring X68000 clock jitter with a USB oscilloscope
The Sharp X68000's original 10 MHz processor clock gives a useful starting point: one nominal period is 100 nanoseconds. A USB oscilloscope makes it possible to inspect that edge timing on a live machine, but a visibly regular waveform can still conceal timing variation. Clock signal jitter is the departure of successive transition instants from an ideal periodic sequence, and it can affect bus timing, video timing and expansion interfaces even when the displayed frequency looks correct.
This guide sets out a practical measurement method for an X68000, from identifying the correct clock to checking whether the result belongs to the computer or to the instrument. It covers probe loading, USB scope acquisition, edge-to-edge statistics and sensible comparisons with other test gear. The aim is a repeatable record rather than a single screenshot, so another hobbyist can repeat the work and reach a comparable verdict.
Identify the signal that matters
Not every clock on an X68000 board is interchangeable. The original 10 MHz CPU clock is related to the processor's timing reference, while oscillator, divider, video and bus clock outputs may have different edge shapes and different amounts of upstream jitter. Later accelerator-equipped models and particular board revisions can also differ, so service documentation and board markings should take precedence over a general specification.
Frequency error and jitter must be separated. Frequency error changes the average number of nanoseconds per cycle; jitter changes from cycle to cycle. Each period is the interval from one edge to the next, and the timing interval error is that interval minus the average interval. Its standard deviation is a useful cycle-to-cycle jitter estimate, while peak-to-peak error shows the largest excursions. Neither value by itself is a complete phase-noise specification.
Choose the earliest accessible point in the clock path. A raw oscillator or clock-generator output is often more informative than a divided signal, since division can transform amplitude noise into timing variation. Test points near the oscillator and clock buffer are preferable to long flying leads. Broad vintage-computing references such as Phil Solomon’s website can also provide useful context when component markings or board construction need a second source of information.
Choose a scope with adequate timing resolution
A USB scope's sample rate is not its timing resolution. A nominal 1 or 2 GS/s rate supplies many samples across a 100 ns clock period, but interpolation, vertical noise, trigger accuracy and the instrument's own timebase determine how confidently sub-nanosecond variation can be measured. Analogue bandwidth also shapes the edge: a slow rise filters harmonics away and can make the clock appear cleaner, or rougher, than its true timing behaviour.
For a 10 MHz signal, 20 to 50 MHz analogue bandwidth is enough to inspect gross ringing and substantial timing variation, while a 100 MHz class instrument is preferable when fine edge detail matters. Very high bandwidth is not automatically better because it also admits more board and probe noise. Compare published rise-time, jitter and timebase specifications rather than relying on the marketing headline, and check local availability from Australian distributors such as Jaycar and specialist measurement suppliers before importing.
Probe loading is often the larger threat to an old circuit. A 10x probe can still add roughly 10 to 15 pF, and the oscilloscope contributes capacitance of its own; a 1x connection may exceed what a high-impedance clock node can tolerate. A passive probe is simple, but a high-impedance active probe or FET probe may preserve the design. Differential probing is safer where the clock sits around a mid-rail voltage or the source is not ground-referenced.
Prepare the computer and probe safely
Begin with a complete visual and electrical inspection. X68000 sets designed for Japan commonly use 100 V AC, whereas Australian mains is 230 V at 50 Hz. Never connect an unmodified Japanese machine to a local outlet. Verify the fitted supply, use a correctly rated and electrically safe step-down arrangement where appropriate, and have the mains side checked by a qualified electrician. The CRT and monitor section retain dangerous voltages after shutdown, so probing should use existing external test points rather than opening the casing.
On the low-voltage side, establish a single, short ground path. A long oscilloscope ground clip can add inductance and create false ringing, while an earth loop can distort a floating circuit. Check whether the USB scope is genuinely isolated at its BNC inputs; a USB cable alone does not guarantee isolation. A spring ground or a short lead clipped to the intended local return, plus a low-capacitance probe, gives a cleaner result. Do not attach the ground to a guessed signal node.
Power the system from a stable source and capture the same clock in several operating states: after warm-up, during floppy or hard-disk access, and while generating graphics or using an expansion. Modern additions such as the Nereid-X can introduce another clock domain, while the X68000 trackball interface illustrates how a new peripheral must coexist with the original clock and bus network. Repeat each capture for a fixed duration and record supply, temperature and software configuration.
Capture and analyse the waveform
Start with a short acquisition, trigger on the selected clock edge, and choose the timebase so several periods are visible. Increase vertical sensitivity until the edge crossings are clear but the waveform remains centred. Use DC coupling for absolute voltage and make sure the probe attenuation matches the scope setting. Save the raw waveform, not just a photograph, because later calculations need individual transition timestamps rather than a screen filled with indistinguishable cycles.
In the scope software, measure edge-to-edge periods over a large sample count and calculate the mean period, standard deviation of timing interval error, minimum, maximum and peak-to-peak spread. A histogram of period values can reveal a stable clock, alternating periods, periodic disturbance or occasional outliers that an average conceals. Report both the standard deviation and the sample count; a 0.2 ns result from 20 cycles is not comparable to the same figure from a million cycles.
Then challenge the measurement. Repeat it on another USB port, change only the timebase, disconnect unnecessary peripherals, compare probe placements and, if possible, test the same source with a second instrument. Trigger jitter can masquerade as source jitter, particularly when the trigger source differs from the displayed channel. Clock-generator phase noise, supply ripple, a marginal buffer, electromagnetic pickup and probe loading can produce similar traces, so correlation with load and temperature is more persuasive than a single captured waveform.
An FFT view can show discrete spurs and sidebands associated with the clock, but it is supporting evidence rather than a replacement for edge timing. Windowing, record length and probe response alter spectral amplitude. Use it to locate suspicious frequencies, then return to the time domain and test whether the corresponding timing pattern changes with load. For very small RMS aggregate jitter, compare against a traceable reference rather than treating the USB scope's own clock as perfect.
Compare instruments and interpret the results
The instrument class determines what can be concluded. A basic USB scope is suitable for teaching, periodic waveforms and obvious instability; a higher-bandwidth model is needed for close inspection of edge harmonics and small timing excursions. A frequency counter is often excellent at establishing average frequency but may not expose a rare timing excursion unless it supports period or time-interval statistics. Compare capabilities before attributing a small reading to the X68000.
| Instrument class | Typical capabilities | Best contribution | Important limitation |
|---|---|---|---|
| Entry-level USB scope | 20–50 MHz bandwidth and 1–2 GS/s sampling | Checking visible ringing and obvious period instability | Trigger or timebase jitter may exceed the variation being measured |
| Mid-range USB scope | 50–100 MHz bandwidth, richer statistics and FFT | Cycle-to-cycle timing, spectral spurs and repeated load tests | Probe capacitance and grounding can still dominate |
| High-bandwidth USB scope | 100–200 MHz or more with fast sampling | Fine edge shape, harmonics and small timing excursions | More sensitive to layout, probe quality and local electrical noise |
| Frequency counter or interval analyser | Precise average frequency and interval readings | Long-term drift and checking outliers | Limited waveform diagnosis and careful trigger setup still required |
Interpret the result in context. A clock that is stable to a few nanoseconds while its average frequency wanders slowly may still work perfectly, while an apparently perfect average with occasional large excursions can cause intermittent faults. Compare readings at the source and at the point used by the circuit, then repeat under load. If jitter changes with supply or temperature, service the power supply and oscillator path first; if it tracks probe placement, treat the probe or grounding as part of the fault.
Document the board revision, clock net, probe, bandwidth setting, sample count, operating state and raw file. Record whether the reading is cycle-to-cycle jitter, peak-to-peak period variation or an average frequency offset. That vocabulary prevents a dramatic but misleading number from being compared with a completely different measurement. Where a suspect reading cannot be reproduced, a time-interval counter with a clean reference is the next logical cross-check.
Clock testing should become a standard part of X68000 maintenance rather than a special event. Capture a known-good baseline, preserve the waveform and settings, and repeat it after any power-supply repair, expansion change or intermittent fault investigation. A public record of that evidence helps the next restorer distinguish original behaviour from a fault introduced by modern hardware or test equipment.
Collectors in Sydney, Melbourne and Brisbane can compare results at local retrocomputing meetups, while Australian hobbyists buying Japanese-market parts through auctions should include oscilloscope probes, replacement crystals and test adapters in the landed cost. GST, customs valuation and carrier handling can materially change that cost. Record the useful details and share them through X68K.NET: the raw waveform, board revision, measurement method and conclusion. That evidence turns an obscure timing symptom into practical knowledge for the whole X68000 community.
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